EDA Tech Forum Journal—the premier EDA publicationEDA Tech Forum journal is a quarterly publication for the Electronics Design Automation community including design engineers, engineering managers, industry executives, and academia. EDA Tech Forum journal provides an ongoing medium in which to discuss, debate, and communicate the electronic design automation industry’s most pressing issues, challenges, methodologies, problem-solving techniques, and trends. |
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<Tech Forum>Embedded Using Open Virtual Platforms to build, simulate and debug multiprocessor SoCsThe Open Virtual Platforms (OVP) initiative aims to help resolve the diffi culties that arise today when modeling multicore systems-on-chip (SoC) so that designers can perform early and timely test of the embedded software that will run on the end devices. ESL/System C Making the move to ESL hardware designThis paper illustrates that increasing maturity by describing a system level-to-RTL design flow. It looks at the issues involved in switching to ESL hardware design and provides insights into some of the appropriate design and verifi cation tools. Verified RTL to gates VHDL moves toward 4.0Version 4.0 of the VHSIC Hardware Design Language was approved by Accellera and passed to the IEEE to begin its formal standards balloting process earlier this year. Digital/analog implementation Sensium: A 1V micropower SoC for vital-sign monitoringThis paper describes the main design components and methodology priorities for development of the Sensium system-on-chip for wireless body sensor networks. The device is targeted at vital-sign monitoring and related medical applications. Design to silicon Migration of the Cell Broadband Engine to 45nm SOIThe paper describes some of the main challenges in the latest process shrink for the Cell Broadband Engine, developed jointly by IBM, Sony and Toshiba. Design to silicon Multi-corner multi-mode signal integrity optimizationSignal integrity (SI) is an ever-growing problem as more interconnect effects and fast clocks increase the chances of crosstalk noise and glitches as well as unexpected signal delays. Tested component to system Implementing an intelligent solar tracking control system on an FPGAThis article describes an FPGA implementation of a solar tracking control system that improves the effi ciency of solar panels by allowing them to follow the movement of the sun and maintain an optimal position perpendicular to it. <Commentary>Analysis Systems design automation for realDesign Automation and Test in Europe is now the world’s leading ESL conference, says Ju?rgen Haase of edacentrum Conference preview Accentuate the practical2008’s Design Automation Conference takes its cue from engineers’ day-to-day need, says chair Limor Fix Interview Intel takes a new path from A to DCTO and DAC keynoter Justin Rattner discusses his company’s research into replacing analog circuitry with digital Standards STIX to the taskA common test equipment interface could be worth millions to the chip industry, explains Keith Imai of the Semiconductor Test Consortium |
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