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Analog verification IP and the next stage in the evolution of system-on-chip

Sandipan Bhanot of Knowlent considers the move to automate AMS IP verification.

bio picSandipan Bhanot is CEO of Knowlent. Before founding the company in 2001, he was the senior product manager for the Silicon Ensemble product line at Cadence Design Systems. He holds an MBA from Haas School of Business, UC Berkeley and a BS in Computer Science from Institute of Technology, Varanasi, India.

Introduction

Considerable effort is being exerted to improve the quality and success of system-on-chip (SoC) designs. Given the demand for more and more features, lower power requirements, and need for blazing speeds to handle increasing data for video and other hungry applications, it is no surprise that complex SoCs are becoming harder to verify. A comprehensive test and verification strategy is vital; otherwise first silicon success is unlikely and precious financial resources are wasted.

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