EDA Tech Forum Journal—the premier EDA publicationEDA Tech Forum journal is a quarterly publication for the Electronics Design Automation community including design engineers, engineering managers, industry executives, and academia. EDA Tech Forum journal provides an ongoing medium in which to discuss, debate, and communicate the electronic design automation industry’s most pressing issues, challenges, methodologies, problem-solving techniques, and trends. |
The article shows how calibrated yield models make design tools fully yield-aware and enable appropriate design-for-manufacturability trade-offs.
Design-for-manufacturability (DFM) has become pervasive and there is general agreement on the need to apply DFM at multiple stages of the design cycle. DFM techniques at the relatively mature 0.13um technology node entail well known enhancements such as contact and via redundancy, line-ends and borders, and wire spreading. Mature technology nodes achieve product yields which, if the major systematics are already localized and addressed, are mainly random defect-limited and receive only an incremental benefit from this DFM set. Mitigating the risk of a late product introduction at 90 and 65nm requires the knowledge that yield is now dominated by systematic yield loss (Figure 1). Process-design integration expertise and infrastructure are critical to proactively and efficiently reduce these manufacturing risks. Accurate yield modeling lies at the core of process-design integration and proactive DFM. Here, we discuss key characteristics of accurate yield modeling required to obtain maximum benefit. To view the rest of the article, login or register below Existing users:New users, register to access all online articles and archives:To register for access to online articles and archives, simply fill out the fields below. Fields marked with
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