EDA Tech Forum Journal—the premier EDA publicationEDA Tech Forum journal is a quarterly publication for the Electronics Design Automation community including design engineers, engineering managers, industry executives, and academia. EDA Tech Forum journal provides an ongoing medium in which to discuss, debate, and communicate the electronic design automation industry’s most pressing issues, challenges, methodologies, problem-solving techniques, and trends. |
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Electronic system level (ESL) is typically defined as design above the register transfer level (RTL). When applied to hardware design, ESL is the process of describing hardware functionality at higher levels of abstraction to increase designer productivity and enable greater degrees of exploration. With ESL, hardware designers no longer spend most of their time designing and verifying RTL code. This seems straightforward, but ESL hardware design presents engineers with a set of noteworthy challenges. These include learning new languages, understanding how to produce quality RTL implementations from system-level code and successfully introducing new EDA tools into the design flow. That said, ESL has now been around for more than 10 years, more and more semiconductor companies are using ESL tools, and consequently ESL methodologies are rapidly maturing. This paper illustrates that increasing maturity by describing a system level-to-RTL design flow. It looks at the issues involved in switching to ESL hardware design and provides insights into some of the appropriate design and verification tools. To view the rest of the article, login or register below Existing users:New users, register to access all online articles and archives:To register for access to online articles and archives, simply fill out the fields below. Fields marked with
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